52 lines
1.0 KiB
Coq
52 lines
1.0 KiB
Coq
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/*
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Flip-Flop D y registro
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*/
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`include "./flip_flop/flip_flop.v"
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module register_tb;
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reg clk, rst, en;
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reg [7:0] d;
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wire [7:0] q;
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register #(.N(8)) dut (
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.clk(clk),
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.rst(rst),
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.en(en),
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.d(d),
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.q(q)
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);
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initial clk = 0;
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always #5 clk = ~clk;
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initial begin
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$dumpfile("./flip_flop/flip_flop.vcd");
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$dumpvars(0, register_tb);
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rst = 1; en = 0; d = 0;
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@(posedge clk); #1
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rst = 0;
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@(posedge clk); #1
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$display("rst=0, en=0, d=%0d, q=%0d (q no cambia)", d, q);
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en = 1; d = 8'd42;
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@(posedge clk); #1
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$display("en=1, d=42 → q=%0d", q);
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d = 8'd99;
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@(posedge clk); #1
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$display("en=1, d=99 → q=%0d", q);
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en = 0; d = 8'd7;
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@(posedge clk); #1
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$display("en=0, d=7 → q=%0d (q mantiene 99)", q);
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rst = 1;
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@(posedge clk); #1
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$display("rst=1 → q=%0d (q=0)", q);
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$finish;
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end
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endmodule
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