/*
    ROM
*/

module rom #(
    parameter DEPTH = 256,
    parameter W     = 16,
    parameter FILE  = ""
) (
    input                       clk,
    input [$clog2(DEPTH)-1:0]   addr,
    output reg [W-1:0]          rd_data
);
    reg [W-1:0] mem [0:DEPTH-1];

    initial $readmemh(FILE, mem);

    always @(posedge clk) begin
        rd_data <= mem[addr];        
    end
endmodule