/*
    Full Adder Declaration

    A  B  Cin | Sum  Cout
    0  0   0  |  0    0
    0  0   1  |  1    0
    0  1   0  |  1    0
    0  1   1  |  0    1
    1  0   0  |  1    0
    1  0   1  |  0    1
    1  1   0  |  0    1
    1  1   1  |  1    1
*/
`include "./half_adder/half_adder.v"

module full_adder_structural (carry_in, a, b, sum, carry_out);
    input carry_in, a, b;
    output sum, carry_out;

    wire add1_sum, add1_carry;
    wire add2_carry;

    half_adder add1(a, b, add1_sum, add1_carry);
    half_adder add2(add1_sum, carry_in, sum, add2_carry);

    or final_or(carry_out, add1_carry, add2_carry);
endmodule

module full_adder_dataflow (carry_in, a, b, sum, carry_out);
    input carry_in, a, b;
    output sum, carry_out;

    assign sum = a ^ b ^ carry_in;
    assign carry_out = (a & b) | (carry_in & (a ^ b));
endmodule

module full_adder_behavioral (carry_in, a, b, sum, carry_out);
    input carry_in, a, b;
    output reg sum, carry_out;

    always @(*) begin
        sum = a ^ b ^ carry_in;
        carry_out = (a & b) | (carry_in & (a ^ b));
    end
endmodule