hdl-projects/adder_nbit/adder_nbit.vcd

$date
	Sat Feb 28 20:27:33 2026
$end
$version
	Icarus Verilog
$end
$timescale
	1s
$end
$scope module adder_nbit_tb $end
$var wire 1 ! carry_out $end
$var wire 8 " sum [7:0] $end
$var reg 8 # a [7:0] $end
$var reg 8 $ b [7:0] $end
$var reg 1 % carry_in $end
$scope module adder_8bit $end
$var wire 8 & a [7:0] $end
$var wire 8 ' b [7:0] $end
$var wire 9 ( carry [8:0] $end
$var wire 1 ) carry_in $end
$var wire 1 ! carry_out $end
$var wire 8 * sum [7:0] $end
$scope begin generar_full_adder[0] $end
$scope module full_adder $end
$var wire 1 + a $end
$var wire 1 , add1_carry $end
$var wire 1 - add1_sum $end
$var wire 1 . add2_carry $end
$var wire 1 / b $end
$var wire 1 0 carry_in $end
$var wire 1 1 carry_out $end
$var wire 1 2 sum $end
$scope module add1 $end
$var wire 1 + a $end
$var wire 1 / b $end
$var wire 1 , carry $end
$var wire 1 - sum $end
$upscope $end
$scope module add2 $end
$var wire 1 - a $end
$var wire 1 0 b $end
$var wire 1 . carry $end
$var wire 1 2 sum $end
$upscope $end
$upscope $end
$upscope $end
$scope begin generar_full_adder[1] $end
$scope module full_adder $end
$var wire 1 3 a $end
$var wire 1 4 add1_carry $end
$var wire 1 5 add1_sum $end
$var wire 1 6 add2_carry $end
$var wire 1 7 b $end
$var wire 1 8 carry_in $end
$var wire 1 9 carry_out $end
$var wire 1 : sum $end
$scope module add1 $end
$var wire 1 3 a $end
$var wire 1 7 b $end
$var wire 1 4 carry $end
$var wire 1 5 sum $end
$upscope $end
$scope module add2 $end
$var wire 1 5 a $end
$var wire 1 8 b $end
$var wire 1 6 carry $end
$var wire 1 : sum $end
$upscope $end
$upscope $end
$upscope $end
$scope begin generar_full_adder[2] $end
$scope module full_adder $end
$var wire 1 ; a $end
$var wire 1 < add1_carry $end
$var wire 1 = add1_sum $end
$var wire 1 > add2_carry $end
$var wire 1 ? b $end
$var wire 1 @ carry_in $end
$var wire 1 A carry_out $end
$var wire 1 B sum $end
$scope module add1 $end
$var wire 1 ; a $end
$var wire 1 ? b $end
$var wire 1 < carry $end
$var wire 1 = sum $end
$upscope $end
$scope module add2 $end
$var wire 1 = a $end
$var wire 1 @ b $end
$var wire 1 > carry $end
$var wire 1 B sum $end
$upscope $end
$upscope $end
$upscope $end
$scope begin generar_full_adder[3] $end
$scope module full_adder $end
$var wire 1 C a $end
$var wire 1 D add1_carry $end
$var wire 1 E add1_sum $end
$var wire 1 F add2_carry $end
$var wire 1 G b $end
$var wire 1 H carry_in $end
$var wire 1 I carry_out $end
$var wire 1 J sum $end
$scope module add1 $end
$var wire 1 C a $end
$var wire 1 G b $end
$var wire 1 D carry $end
$var wire 1 E sum $end
$upscope $end
$scope module add2 $end
$var wire 1 E a $end
$var wire 1 H b $end
$var wire 1 F carry $end
$var wire 1 J sum $end
$upscope $end
$upscope $end
$upscope $end
$scope begin generar_full_adder[4] $end
$scope module full_adder $end
$var wire 1 K a $end
$var wire 1 L add1_carry $end
$var wire 1 M add1_sum $end
$var wire 1 N add2_carry $end
$var wire 1 O b $end
$var wire 1 P carry_in $end
$var wire 1 Q carry_out $end
$var wire 1 R sum $end
$scope module add1 $end
$var wire 1 K a $end
$var wire 1 O b $end
$var wire 1 L carry $end
$var wire 1 M sum $end
$upscope $end
$scope module add2 $end
$var wire 1 M a $end
$var wire 1 P b $end
$var wire 1 N carry $end
$var wire 1 R sum $end
$upscope $end
$upscope $end
$upscope $end
$scope begin generar_full_adder[5] $end
$scope module full_adder $end
$var wire 1 S a $end
$var wire 1 T add1_carry $end
$var wire 1 U add1_sum $end
$var wire 1 V add2_carry $end
$var wire 1 W b $end
$var wire 1 X carry_in $end
$var wire 1 Y carry_out $end
$var wire 1 Z sum $end
$scope module add1 $end
$var wire 1 S a $end
$var wire 1 W b $end
$var wire 1 T carry $end
$var wire 1 U sum $end
$upscope $end
$scope module add2 $end
$var wire 1 U a $end
$var wire 1 X b $end
$var wire 1 V carry $end
$var wire 1 Z sum $end
$upscope $end
$upscope $end
$upscope $end
$scope begin generar_full_adder[6] $end
$scope module full_adder $end
$var wire 1 [ a $end
$var wire 1 \ add1_carry $end
$var wire 1 ] add1_sum $end
$var wire 1 ^ add2_carry $end
$var wire 1 _ b $end
$var wire 1 ` carry_in $end
$var wire 1 a carry_out $end
$var wire 1 b sum $end
$scope module add1 $end
$var wire 1 [ a $end
$var wire 1 _ b $end
$var wire 1 \ carry $end
$var wire 1 ] sum $end
$upscope $end
$scope module add2 $end
$var wire 1 ] a $end
$var wire 1 ` b $end
$var wire 1 ^ carry $end
$var wire 1 b sum $end
$upscope $end
$upscope $end
$upscope $end
$scope begin generar_full_adder[7] $end
$scope module full_adder $end
$var wire 1 c a $end
$var wire 1 d add1_carry $end
$var wire 1 e add1_sum $end
$var wire 1 f add2_carry $end
$var wire 1 g b $end
$var wire 1 h carry_in $end
$var wire 1 i carry_out $end
$var wire 1 j sum $end
$scope module add1 $end
$var wire 1 c a $end
$var wire 1 g b $end
$var wire 1 d carry $end
$var wire 1 e sum $end
$upscope $end
$scope module add2 $end
$var wire 1 e a $end
$var wire 1 h b $end
$var wire 1 f carry $end
$var wire 1 j sum $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
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0,
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b101 *
0)
b0 (
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b0 &
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b0 #
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0!
$end
#1
1:
1J
b1111 "
b1111 *
15
1E
13
1C
b1010 #
b1010 &
#2
1H
0:
0B
1A
b1000 (
1J
1Z
1b
b1101001 "
b1101001 *
05
0=
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0E
1U
1]
03
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0C
1S
1[
b1100100 #
b1100100 &
#3