Files
hdl-projects/half_adder
Jose Luis Montañes Ojados d094ff3148 first commit
2026-02-28 21:59:55 +01:00
..
2026-02-28 21:59:55 +01:00
2026-02-28 21:59:55 +01:00
2026-02-28 21:59:55 +01:00
2026-02-28 21:59:55 +01:00
2026-02-28 21:59:55 +01:00
2026-02-28 21:59:55 +01:00

  1. Compilar el testbench iverilog -o .\half_adder_tb.vvp .\half_adder_tb.v

  2. Ejecutar simulacion del testbench vvp .\half_adder_tb.vvp

  3. Visualizar ondas gtkwave .\half_adder.vcd