178 lines
8.3 KiB
Markdown
178 lines
8.3 KiB
Markdown
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# Especificaciones
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Arquitectura: 16bit
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Tamaño de instruccion: 16bit
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PROM: Ilimitado
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RAM: 1kB - 20kB
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STACK: 256 - Ilimitado
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# Registros
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Cada registro puede almacenar 16 bits
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| ADDR | NAME | NOTES |
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| ---- | -------- | --------- |
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| 0x00 | REG0 | |
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| 0x01 | REG1 | |
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| 0x02 | REG2 | |
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| 0x03 | REG3 | |
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| 0x04 | REG4 | |
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| 0x05 | REG5 | |
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| 0x06 | REG6 | |
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| 0x07 | REG7 | |
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| 0x08 | REG8 | |
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| 0x09 | REG9 | |
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| 0x0A | REG10 | |
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| 0x0B | REG11 | |
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| 0x0C | REG12 | RAM VALUE |
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| 0x0D | REG13 | RAM ADDR |
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| 0x0E | PC | |
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| 0x0F | IN/OUT | |
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# Opcodes
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Las instrucciones en este CPU tienen un tamaño total de 8 bytes, es decir, 4 parametros de 16bit cada uno.
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[OPCODE] [PARAM1] [PARAM2] [TARGET1]
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PARAM1 y PARAM2 soportan 2 modos de direccionamiento:
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- Modo registro
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- Modo inmediato
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TARGET1 indica el registro donde se guardará el resultado.
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## ALU
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| OPCODE | ADDR | PARAM1 | PARAM2 | TARGET1 | DESCRIPTION |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| ADD | 0x00 | R0 | R1 | T1 | |
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| SUB | 0x01 | R0 | R1 | T1 | |
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| MUL | 0x02 | R0 | R1 | T1 | |
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| DIV | 0x03 | R0 | R1 | T1 | |
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| AND | 0x04 | R0 | R1 | T1 | |
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| OR | 0x05 | R0 | R1 | T1 | |
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| NOT | 0x06 | R0 | R1 | T1 | |
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| NAND | 0x07 | R0 | R1 | T1 | |
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| NOR | 0x08 | R0 | R1 | T1 | |
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| XOR | 0x09 | R0 | R1 | T1 | |
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| XNOR | 0x0A | R0 | R1 | T1 | |
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| NEG | 0x0B | R0 | R1 | T1 | |
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| - | 0x0C | | | | |
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| - | 0x0D | | | | |
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| - | 0x0E | | | | |
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| - | 0x0F | | | | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| ADD | 0x40 | #0 | R1 | T1 | |
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| SUB | 0x41 | #0 | R1 | T1 | |
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| MUL | 0x42 | #0 | R1 | T1 | |
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| DIV | 0x43 | #0 | R1 | T1 | |
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| AND | 0x44 | #0 | R1 | T1 | |
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| OR | 0x45 | #0 | R1 | T1 | |
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| NOT | 0x46 | #0 | R1 | T1 | |
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| NAND | 0x47 | #0 | R1 | T1 | |
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| NOR | 0x48 | #0 | R1 | T1 | |
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| XOR | 0x49 | #0 | R1 | T1 | |
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| XNOR | 0x4A | #0 | R1 | T1 | |
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| NEG | 0x4B | #0 | R1 | T1 | |
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| - | 0x4C | | | | |
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| - | 0x4D | | | | |
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| - | 0x4E | | | | |
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| - | 0x4F | | | | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| ADD | 0x80 | R0 | #1 | T1 | |
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| SUB | 0x81 | R0 | #1 | T1 | |
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| MUL | 0x82 | R0 | #1 | T1 | |
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| DIV | 0x83 | R0 | #1 | T1 | |
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| AND | 0x84 | R0 | #1 | T1 | |
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| OR | 0x85 | R0 | #1 | T1 | |
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| NOT | 0x86 | R0 | #1 | T1 | |
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| NAND | 0x87 | R0 | #1 | T1 | |
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| NOR | 0x88 | R0 | #1 | T1 | |
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| XOR | 0x89 | R0 | #1 | T1 | |
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| XNOR | 0x8A | R0 | #1 | T1 | |
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| NEG | 0x8B | R0 | #1 | T1 | |
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| - | 0x8C | | | | |
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| - | 0x8D | | | | |
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| - | 0x8E | | | | |
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| - | 0x8F | | | | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| ADD | 0xC0 | #0 | #1 | T1 | |
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| SUB | 0xC1 | #0 | #1 | T1 | |
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| MUL | 0xC2 | #0 | #1 | T1 | |
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| DIV | 0xC3 | #0 | #1 | T1 | |
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| AND | 0xC4 | #0 | #1 | T1 | |
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| OR | 0xC5 | #0 | #1 | T1 | |
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| NOT | 0xC6 | #0 | #1 | T1 | |
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| NAND | 0xC7 | #0 | #1 | T1 | |
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| NOR | 0xC8 | #0 | #1 | T1 | |
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| XOR | 0xC9 | #0 | #1 | T1 | |
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| XNOR | 0xCA | #0 | #1 | T1 | |
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| NEG | 0xCB | #0 | #1 | T1 | |
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| - | 0xCC | | | | |
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| - | 0xCD | | | | |
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| - | 0xCE | | | | |
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| - | 0xCF | | | | |
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## CONDITIONALS
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En los condicionales TARGET1 representa a la direccion del PC (Program Counter) que se saltará si se cumple la condicion.
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| OPCODE | ADDR | PARAM1 | PARAM2 | TARGET1 | DESCRIPTION |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| EQ | 0x10 | R0 | R1 | T1 | equal |
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| NEQ | 0x11 | R0 | R1 | T1 | not equal |
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| LS | 0x12 | R0 | R1 | T1 | less |
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| LSE | 0x13 | R0 | R1 | T1 | less or eq |
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| GR | 0x14 | R0 | R1 | T1 | greater |
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| GRE | 0x15 | R0 | R1 | T1 |greater or eq|
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| | 0x16 | R0 | R1 | T1 | |
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| | 0x17 | R0 | R1 | T1 | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| EQ | 0x50 | #0 | R1 | T1 | equal |
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| NEQ | 0x51 | #0 | R1 | T1 | not equal |
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| LS | 0x52 | #0 | R1 | T1 | less |
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| LSE | 0x53 | #0 | R1 | T1 | less or eq |
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| GR | 0x54 | #0 | R1 | T1 | greater |
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| GRE | 0x55 | #0 | R1 | T1 |greater or eq|
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| | 0x56 | #0 | R1 | T1 | |
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| | 0x57 | #0 | R1 | T1 | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| EQ | 0x90 | R0 | #1 | T1 | equal |
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| NEQ | 0x91 | R0 | #1 | T1 | not equal |
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| LS | 0x92 | R0 | #1 | T1 | less |
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| LSE | 0x93 | R0 | #1 | T1 | less or eq |
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| GR | 0x94 | R0 | #1 | T1 | greater |
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| GRE | 0x95 | R0 | #1 | T1 |greater or eq|
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| | 0x96 | R0 | #1 | T1 | |
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| | 0x97 | R0 | #1 | T1 | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| EQ | 0xD0 | #0 | #1 | T1 | equal |
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| NEQ | 0xD1 | #0 | #1 | T1 | not equal |
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| LS | 0xD2 | #0 | #1 | T1 | less |
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| LSE | 0xD3 | #0 | #1 | T1 | less or eq |
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| GR | 0xD4 | #0 | #1 | T1 | greater |
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| GRE | 0xD5 | #0 | #1 | T1 |greater or eq|
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| | 0xD6 | #0 | #1 | T1 | |
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| | 0xD7 | #0 | #1 | T1 | |
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## CONTROL UNIT
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| OPCODE | ADDR | PARAM1 | PARAM2 | TARGET1 | DESCRIPTION |
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| RSTR | 0x18 | -- | -- | - | |
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| PUSH | 0x19 | R1 | -- | - | |
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| POP | 0x1A | -- | -- | T1 | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| PUSH | 0x59 | #1 | -- | - | |
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## FUNCTIONS
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| OPCODE | ADDR | PARAM1 | PARAM2 | TARGET1 | DESCRIPTION |
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| CALL | 0x20 | R1 | -- | - | |
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| RET | 0x21 | -- | -- | - | |
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| HALT | 0x22 | -- | -- | - | |
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| ------ | ---- | ------ | ------ | ------- | ----------- |
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| CALL | 0x60 | #1 | -- | - | |
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