add counter

counter/counter.v

@@ -0,0 +1,18 @@
+/*
+    Contador
+*/
+
+module counter #(parameter N = 8) (
+    input clk,
+    input rst,
+    input write,
+    input [N-1:0] write_value,
+    output reg [N-1:0] count
+);
+
+    always @(posedge clk or posedge rst) begin
+        if (rst) count <= 0;
+        else if (write) count <= write_value;
+        else count <= count + 1; 
+    end
+endmodule